It is often necessary in semiconductor processing to fill high aspect ratio gaps with insulating material. This is the case for shallow trench isolation (STI), inter-metal dielectric (IMD) layers, inter-layer dielectric (ILD) layers, pre-metal dielectric (PMD) layers, passivation layers, etc. As device geometries shrink and thermal budgets are reduced, void-free filling of narrow width, high aspect ratio (AR) features (e.g., AR>6:1) becomes increasingly difficult due to limitations of existing deposition processes.
High density plasma (HDP) chemical vapor deposition (CVD), a directional (bottom-up) CVD process, is the method currently used for high aspect ratio gapfill. HDP CVD deposits more material at the bottom of a high aspect ratio structure than on its sidewalls. It accomplishes this by directing dielectric precursor species downward, to the bottom of the gap while simultaneously removing deposited material from the trench top through sputtering by the use of biased RF power applied to the substrate. The ratio of sputter to deposition (S/D) determines the property of the material deposited. A more conformal layer with better step coverage is achieved with a higher S/D ratio.
However, HDP CVD gapfill results in the formation of overhangs, at the entry region of the gap to be filled. These formations result from sputtering and redeposition processes. The directional aspect of the deposition process produces some high momentum charged species that sputter away material from within the gap. The sputtered material tends to redeposit on the sidewalls of high AR structures. As a result, the entry region of a high aspect ratio structure may close before bottom-up fill has been completed, leaving voids or weak spots within the structure. This phenomenon, known as “pinch-off,” is exacerbated in narrow features. The overhangs cannot be totally eliminated because non-directional reactions of neutral species and sputtering and redeposition reactions are inherent to the physics and chemistry of the HDP CVD processes.
In some gap fill applications, particularly in the case of small features with high aspect ratios, a multi-step deposition/etch back process has been used in order to remove the overhangs and facilitate void-free gap fill. For example, a deposition and etch process utilizing HDP CVD deposition and an aqueous HF dip for the etch back step has been used. However, this requires that the wafers be cycled between the plasma deposition system and the wet etch back system for a number of cycles. This results in a long cycle time and correspondingly large capital investment to run the multiple steps for gap fill.
In-situ multi-step plasma deposition/etch processes have also been used to keep the entry to the gap from closing before it is filled. Such in-situ HDP CVD deposition and etch back processes are described, for example, in U.S. Pat. Nos. 7,163,896, 6,030,881, 6,395,150, and 6,867,086, the disclosures of which are incorporated herein by reference for all purposes. Some of these in-situ plasma etch back processes use high-energy ions to create a significantly anisotropic sputter etch. Other in-situ plasma etch back processes use chemically-reactive etch gases (e.g., nitrogen trifluoride, NF3) to create a significantly isotropic plasma etch.
While these in-situ multi-step deposition and etch back processes have improved high aspect ratio gap fill capabilities, dielectric deposition processes that can reliably fill high aspect ratio features of narrow width, particularly very small features continue to be sought.